1 x 2-hour lecture weekly
1 x 2-hour workshop weekly
1 x 2-hour laboratory weekly
^ = may be enrolled concurrently
1 ^ ENGR2721 - Microprocessors
2 ENGR2772 - Sensors and Actuators
Must Satisfy: ((1) or (2))
Enrolment not permitted
1 of ENGR4751, ENGR8781, ENGR9781 has been successfully completed
Topic description

This topic covers: Hardware Description Languages - VHDL including: Behavioural Design, Structural Design, Synthesis, Simulation; Field Programmable Gate Arrays; Computer Organisation; Instruction Set Architectures; Datapath Design, Computer Arithmetic, Performance Metrics, Microprogramming; Pipeline Architecture, Memory Hierarchy, Bus Interconnect, Storage Devices.

Educational aims

This topic aims to introduce students to the fundamental principles of computer organisation and design. The topic is structured to allow students to apply fundamental digital design concepts (taught in Digital Electronics 1) to the development of microprocessor devices and embedded systems. The topic's aims are realized through the use of computer aided design tools that enable students to design and implement microprocessor architectures on reconfigurable integrated circuits within the laboratory.

Expected learning outcomes
On completion of this topic you will be expected to be able to:

  1. Design microprocessor circuits
  2. Design, simulate, and synthesise embedded systems using the VHDL programming language
  3. Understand the use of CAD (computer aided design) tools for field programmable gate array (FPGA) design
  4. Understand the concepts involved in designing instruction set architectures
  5. Understand the concepts involved in quantifying and improving computer performance
  6. Understand techniques used in interfacing memory and data storage systems
  7. Identify appropriate design solutions for given requirements
  8. Work independently and as a member of a project team

Key dates and timetable

(1), (2)

Each class is numbered in brackets.
Where more than one class is offered, students normally attend only one.

Classes are held weekly unless otherwise indicated.


If you are enrolled for this topic, but all classes for one of the activities (eg tutorials) are full,
contact your College Office for assistance. Full classes frequently occur near the start of semester.

Students may still enrol in topics with full classes as more places will be made available as needed.

If this padlock appears next to an activity name (eg Lecture), then class registration is closed for this activity.

Class registration normally closes at the end of week 2 of each semester.

Classes in a stream are grouped so that the same students attend all classes in that stream.
Registration in the stream will result in registration in all classes.
  Unless otherwise advised, classes are not held during semester breaks or on public holidays.